Design Engineer (ASIC) : 9482290

Design Engineer (ASIC) : 9482290

Infotech Sourcing
– Menlo Park, CA

Job Title: Design EngineerLocation: Menlo Park, CADuration: 12+ months Duties:Manage implementation custom ASIC IP and FPGA/Zebu prototype designsRESPONSIBILITIESCo-ordinate between Architectures, Designers and Verification engineers to develop schedules, milestones and tasks.Manage and track schedule & tasks using facebook tools.Support the IP team in cross functional interaction.Assist the program to get synthesis and timing closed on schedule.Work with FPGA engineers to align deliverablesSupport activiiteis to handoff and integration of blocks into larger SOC environmentsAssist with Algorithm analysis, verification and improvementContribute to ASIC digital architecture, design and verificationAbility to document and communicate clearlySkills: MINIMUM QUALIFICATIONS10+ years of experience as a ASIC Design EngineerExperience with program management tools.Exposure to IP architecture, Micro-Architecture, RTL coding, verification methodology, Lint/CDC tools, synthesis and LEC toolsPREFFERED QUALIFICATIONSExposure to HLS coding using Catapult and Xilinx Vivado toolsPython (or similar) scripting experienceASIC design experienceMasters Degree in EEEducation: BS Electrical Engineering/Computer Science or equivalent experienceRequired Skills: CODINGDESIGN ENGINEERDIGITAL DESIGNENGINEERLEC Additional Skills:ALGORITHMANALOG SILICONAPPLICATION-SPECIFIC INTEGRATED CIRCUITARCHITECTUREASICASIC DESIGNELECTRICAL ENGINEERINGFIELD PROGRAMMABLE GATE ARRAYFPGAINTEGRATIONINTEGRATORPROTOTYPEPROTOTYPINGPYTHONSCRIPTINGSOCVERILOGXILINX
Posted On: Wednesday, October 16, 2019

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